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GPIO Registers

5.1.12 Video Port Pin Interrupt Clear Register (PICLR)

PICLR is an alias of the video port pin interrupt status register (PISTAT) for writes only. Writing a 1 to a bit of PICLR clears the corresponding bit in PISTAT. Writing a 0 has no effect. Register reads return all 0s.

The video port pin interrupt clear register (PICLR) is shown in Figure 5-12and described in Table 5-13.

Figure 5-12. Video Port Pin Interrupt Clear Register (PICLR)

31

 

 

 

 

 

 

24

 

 

 

Reserved

 

 

 

 

 

 

 

R-0

 

 

 

23

22

21

20

19

18

17

16

Reserved

PICLR22

PICLR21

PICLR20

PICLR19

PICLR18

PICLR17

PICLR16

R-0

W-0

W-0

W-0

W-0

W-0

W-0

W-0

15

14

13

12

11

10

9

8

PICLR15

PICLR14

PICLR13

PICLR12

Reserved

Reserved

PICLR9

PICLR8

W-0

W-0

W-0

W-0

R-0

R-0

W-0

W-0

7

6

5

4

3

2

1

0

PICLR7

PICLR6

PICLR5

PICLR4

PICLR3

PICLR2

Reserved

Reserved

W-0

W-0

W-0

W-0

W-0

W-0

R-0

R-0

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 5-13. Video Port Pin Interrupt Clear Register (PICLR) Field Descriptions

Bit

field (1)

symval (1)

Value

Description

31-23

Reserved

-

0

Reserved. The reserved bit location is always read as 0. A value written to this field

 

 

 

 

has no effect.

22

PICLR22

OF(value)

 

Allows PISTAT22 bit to be cleared to a logic low.

 

 

DEFAULT

0

No effect.

 

 

NONE

 

 

 

 

VCTL3CLR

1

Clears PISTAT22 (VCTL3) bit to 0.

21

PICLR21

OF(value)

 

Allows PISTAT21 bit to be cleared to a logic low.

 

 

DEFAULT

0

No effect.

 

 

NONE

 

 

 

 

VCTL2CLR

1

Clears PISTAT21 (VCTL2) bit to 0.

20

PICLR20

OF(value)

 

Allows PISTAT20 bit to be cleared to a logic low.

 

 

DEFAULT

0

No effect.

 

 

NONE

 

 

 

 

VCTL1CLR

1

Clears PISTAT20 (VCTL1) bit to 0.

19-2

PICLR[19-2]

OF(value)

 

Allows PISTAT[19-2] bit to be cleared to a logic low.

 

 

DEFAULT

0

No effect.

 

 

NONE

 

 

 

 

VDATAnCLR

1

Clears PISTAT[n] (VDATA[n]) bit to 0.

(1)For CSL implementation, use the notation VP_PICLR_PICLRn_symval

166

General-Purpose I/O Operation

SPRUEM1 –May 2007

 

 

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Texas Instruments TMS320DM648 manual Video Port Pin Interrupt Clear Register Piclr, PICLR22