Texas Instruments TMS320DM648 manual List of Figures

List of Figures

	1-1	Video Port Block Diagram	18
	1-2	BT.656 Video Capture FIFO Configuration	20
	1-3	8-Bit Raw Video Capture and TCI Video Capture FIFO Configuration	21
	1-4	Y/C Video Capture FIFO Configuration	22
	1-5	16-Bit Raw Video Capture FIFO Configuration	23
	1-6	BT.656 Video Display FIFO Configuration	23
	1-7	8-Bit Raw Video Display FIFO Configuration	23
	1-8	8-Bit Locked Raw Video Display FIFO Configuration	24
	1-9	16-Bit Raw Video Display FIFO Configuration	24
	1-10	Y/C Video Display FIFO Configuration	25
	2-1	Video Port Control Register (VPCTL)	35
	2-2	Video Port Status Register (VPSTAT)	37
	2-3	Video Port Interrupt Enable Register (VPIE)	38
	2-4	Video Port Interrupt Status Register (VPIS)	40
	3-1	Video Capture Parameters	48
	3-2	8-Bit BT.656 FIFO Packing	50
	3-3	8-Bit Y/C FIFO Packing	51
	3-4	VCOUNT Operation Example (EXC = 0)	54
	3-5	HCOUNT Operation Example (EXC = 0)	55
	3-6	HCOUNT Operation Example (EXC = 1)	56
	3-7	Field 1 Detection Timing	57
	3-8	Chrominance Re-sampling	58
	3-9	1/2 Scaled Co-Sited Filtering	59
	3-10	1/2 Scaled Chrominance Re-sampled Filtering	59
	3-11	Edge Pixel Replication	60
	3-12	Capture Window Not Requiring Edge Pixel Replication	60
	3-13	8-Bit Raw Data FIFO Packing	62
	3-14	16-Bit Raw Data FIFO Packing	63
	3-15	Parallel TCI Capture	64
	3-16	Program Clock Reference (PCR) Header Format	64
	3-17	System Time Clock Counter Operation	65
	3-18	TCI FIFO Packing	66
	3-19	TCI Timestamp Format (Little Endian)	66
	3-20	Capture Line Boundary Example	67
	3-21	Video Capture Channel x Status Register (VCxSTAT)	71
	3-22	Video Capture Channel A Control Register (VCACTL)	73
	3-23	Video Capture Channel x Field 1 Start Register (VCxSTRT1)	76
	3-24	Video Capture Channel x Field 1 Stop Register (VCxSTOP1)	77
	3-25	Video Capture Channel x Field 2 Start Register (VCxSTRT2)	77
	3-26	Video Capture Channel x Field 2 Stop Register (VCxSTOP2)	78
	3-27	Video Capture Channel x Vertical Interrupt Register (VCxVINT)	79
	3-28	Video Capture Channel x Threshold Register (VCxTHRLD)	80
	3-29	Video Capture Channel x Event Count Register (VCxEVTCT)	81
	3-30	Video Capture Channel B Control Register (VCBCTL)	82
	3-31	TCI Capture Control Register (TCICTL)	84
	3-32	TCI Clock Initialization LSB Register (TCICLKINITL)	85
	3-33	TCI Clock Initialization MSB Register (TCICLKINITM)	86
	3-34	TCI System Time Clock LSB Register (TCISTCLKL)	87
	3-35	TCI System Time Clock MSB Register (TCISTCLKM)	87
	3-36	TCI System Time Clock Compare LSB Register (TCISTCMPL)	88
	3-37	TCI System Time Clock Compare MSB Register (TCISTCMPM)	88
	3-38	TCI System Time Clock Compare Mask LSB Register (TCISTMSKL)	89
8	List of Figures		SPRUEM1 –May 2007

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