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Video Port Pin Mapping
1.4Video Port Pin Mapping
The video port requires 21 external signal pins for full functionality. Pin usage and direction changes depend on the selected operating mode. Pin functionality detail for video capture mode is listed in Table
Table 1-1. Video Capture Signal Mapping(1)
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| Usage |
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| BT.656 Capture Mode |
| Raw Data Capture Mode |
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| Single | Y/C Capture |
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| TCI Capture |
Video Port Signal | I/O | Dual Channel | Channel | Mode | Mode | ||
I/O | |||||||
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| (In) Ch A | (In) Ch A | (In) (Y) | (In) Ch A | (In) | (In) |
I/O | Not Used | Not Used | |||||
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| (In) Ch B |
| (In) (Cb/Cr) | (In) Ch B | (In) |
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VCLK1 | I | VCLKINA (In) | VCLKINA (In) | VCLKINA (In) | VCLKINA (In) | VCLKINA (In) | VCLKINA (In) |
VCLK1 | I/O | VCLKINB (In) | Not Used | Not Used | VCLKINB (In) | Not Used | Not Used |
VCTL1 | I/O | CAPENA | CAPENA/ | CAPENA/ | CAPENA | CAPENA | CAPENA |
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| (In) | AVID/HSYNC | AVID/HSYNC | (In) | (In) | (In) |
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| (In) | (In) |
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VCTL2 | I/O | CAPENB | VBLNK/ | VBLNK/ | CAPENB | Not Used | PACSTRT |
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| (In) | VSYNC (In) | VSYNC (In) | (In) |
| (In) |
VCTL3 | I/O | Not Used | FID | FID | FID (In) | FID (In) | PACERR |
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| (In) | (In) | Ch A | Ch A | (In) |
(1)Legend: VCLKINA – Channel A capture clock; CAPENA – Channel A capture enable; VCLKINB – Channel B capture clock; CAPENB – Channel B capture enable; AVID – Active video; HSYNC – Horizontal synchronization; VBLNK – Vertical blanking; VSYNC – Vertical synchronization; FID – Field identification; PACSTRT – Packet start; PACERR – Packet error
Table 1-2. Video Display Signal Mapping
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| Usage |
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| BT.656 Display | Y/C Display | Raw Data Display Mode | ||
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Video Port Signal | I/O | Mode | Mode |
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I/O | ||||||
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| (Out) | (Out) (Y) | (Out) | (Out) | (Out) (Ch A) |
I/O | Not Used | Not Used | ||||
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| (Out) (Cb/Cr) |
| (Out) | (Out) (Ch B) |
VCLK1 | I | VCLKIN (In) | VCLKIN (In) | VCLKIN (In) | VCLKIN (In) | VCLKIN (In) |
VCLK1 | I/O | VCLKOUT (Out) | VCLKOUT (Out) | VCLKOUT (Out) | VCLKOUT (Out) | VCLKOUT (Out) |
VCTL1 | I/O | HSYNC/HBLNK/ | HSYNC/HBLNK/ | HSYNC/HBLNK/ | HSYNC/HBLNK/ | HSYNC/HBLNK/ |
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| AVID/FLD (Out) | AVID/FLD (Out) | AVID/FLD (Out) | AVID/FLD (Out) | AVID/FLD (Out) |
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| or HSYNC (In) | or HSYNC (In) | or HSYNC (In) | or HSYNC (In) | or HSYNC (In) |
VCTL2 | I/O | VSYNC/VBLNK/C | VSYNC/VBLNK/C | VSYNC/VBLNK/C | VSYNC/VBLNK/C | VSYNC/VBLNK/C |
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| SYNC/FLD (Out) | SYNC/FLD (Out) | SYNC/FLD (Out) | SYNC/FLD (Out) | SYNC/FLD (Out) |
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| or VSYNC (In) | or VSYNC (In) | or VSYNC (In) | or VSYNC (In) | or VSYNC (In) |
VCTL3 | I/O | CBLNK/FLD | CBLNK/FLD | CBLNK/FLD | CBLNK/FLD | CBLNK/FLD |
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| (Out) or FLD (In) | (Out) or FLD (In) | (Out) or FLD (In) | (Out) or FLD (In) | (Out) or FLD (In) |
26 | Overview | SPRUEM1 |
