Chapter 1 Cisco ASR 1000 Series Routers Hardware Overview
Cisco ASR 1000 Series Routers Configurations
•One
•Both
•High availability software architecture
The Cisco QuantumFlow Processor processing provides:
•Architecture to address Cisco ASR 1000 Series Router performance, cost, power, and feature velocity
•Next Generation forwarding and queuing subsystems for Cisco routers to provide data path acceleration.
The Cisco ASR 1000 Series Router processor system performs the following system management functions:
•Sending and receiving routing protocol updates
•Managing tables, caches, and buffers
•Monitoring interface and environmental status
•Providing Simple Network Management Protocol (SNMP) management through the console and Telnet interface
•Accounting for and switching of data traffic
•Booting and reloading images
Cisco ASR 1000 Series Routers Configurations
The Cisco ASR 1000 Series Routers consist of a number of packaging configurations. The chassis configurations are modular with separate
With the exception of the Cisco ASR 1002 Router, all FRUs (Cisco ASR 1000 Series Route Processor 1, Cisco ASR 1000 Series Embedded Services Processor, and SPAs) are designed to work in the different chassis models. (The Cisco
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| I/O Card | Maximum SPAs | Redundant RP1 |
| Redundant ESP | Redundant Power | ||||
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| Chassis | Slots | Supported | Option |
| Option | Supply Option | ||||
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| Cisco ASR | 3 | 12 HH | Yes |
| Yes | 1 + 1 |
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1006 |
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| Cisco ASR | 2 | 8 HH | No |
| No | 1 + 1 |
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1004 |
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| Cisco ASR | 0 | 3 HH (1 | No |
| No | 1 + 1 |
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1002 |
| 4x1GE) |
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| Cisco ASR 1000 Series Aggregaion Services Routers Hardware Installation and Initial Configuration Guide |
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