Digi NS7520 manual About the MEM module, MEM module hardware initialization, Pin configuration

A b o u t t h e M E M m o d u l e

About the MEM module

The MEM module monitors the BBus interface for access to the BUS module; that is, any access not addressing internal resources. If the BBus for the access corresponds to a Base Address register in the MEM module, the module provides the memory access signals and responds to the BBus with the appropriate completion signal.

The MEM module can be configured to interface with FP, EDO, or synchronous DRAM (SDRAM), although the NS7520 cannot interface with more than one device type at a time.

MEM module hardware initialization

Many NS7520 configuration features are application-specific and need to be configured at powerup before the CPU boots. See "NS7520 bootstrap initialization" on page 60.

PORTA2, the DRAM address multiplexer, provides for an external address mux for SDRAM, FP DRAM, or EDO DRAM.

Pin configuration

The NS7520 uses several pins to support SRAM and DRAM devices. The MEM module controls the following signals: ADDR[27:0], CS[4:0], CAS[3:0], WE_ and OE_. Table 34 shows how MEM module pins are configured for different memory types.

Mode	A27:14	A13:0	CSx	CAS3_	CAS2_	CAS1_	CAS0_ OE_ WE_
SRAM	Address	Address	CS[4:0]_	———	———	———	——— OE_ WE_
DRAM-FP	Address	Internal	RAS_	CAS3_	CAS2_	CAS1_	CAS0_	OE_	WE_
		mux
DRAM-EDO	Address	Internal	RAS_	CAS3_	CAS2_	CAS1_	CAS0_	OE_	WE_
		mux

Table 34: MEM module pin configuration by memory type

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