M E M m o d u l e c o n f i g u r a t i o n

Bits

Access

Mnemonic

Reset

Description

 

 

 

 

 

D01

R/W

WP

0

Write-protect the chip select

 

 

 

 

Prevents any bus master from writing to

 

 

 

 

the memory device. When set to 1, all

 

 

 

 

memory write-cycles are terminated

 

 

 

 

immediately with a data-abort indicator.

 

 

 

 

The WP bit can protect non-volatile

 

 

 

 

memory devices such as flash and

 

 

 

 

EEPROM.

 

 

 

 

 

D00

R/W

V

0

Valid bit

 

 

 

 

Enables the chip select. When set to 1,

 

 

 

 

the memory controller uses the fields in

 

 

 

 

the Chip Select Base Address and Chip

Select Option registers to control the behavior of the peripheral memory cycles.

Note: It is important that you set the V bit last, after all other bits in the MMCR, Chip Select Base Address, and both Chip Select Option registers are set.

Table 37: Chip Select Base Address register bit definition

9 6

N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v . D 0 3 / 2 0 0 6

Page 110
Image 110
Digi NS7520 manual Write-protect the chip select, Eeprom, Valid bit