S e r i a l C h a n n e l r e g i s t e r s

Bits

Access

Mnemonic

Reset

Description

 

 

 

 

 

D28

R/W

TXSRC

0

Transmit clock source

 

 

 

 

0

Internal

 

 

 

 

1

External (input through OUT2 signal)

 

 

 

 

Controls the source of the transmitter clock.

 

 

 

 

The transmitter clock can be provided by an

 

 

 

 

internal source, as determined by the value in

 

 

 

 

the TICS field, or by an input on the OUT2

 

 

 

 

signal attached to the PORTC pin (configured

 

 

 

 

as a special function input).

 

 

 

 

 

D27

R/W

RXEXT

0

Drive receive clock external

 

 

 

 

0

Disable

 

 

 

 

1

Enable; drive RXCLK out OUT1 signal at

 

 

 

 

 

PORTA/PORTC

 

 

 

 

Enables the receiver clock to be driven on the

 

 

 

 

OUT1 signal attached to the PORTA/PORTC

 

 

 

 

ports. When using the OUT1 signal, the

 

 

 

 

PORTA/PORTC pin must be configured as

 

 

 

 

special function output.

 

 

 

 

 

D26

R/W

TXEXT

0

Drive transmit clock external

 

 

 

 

0

Disable

 

 

 

 

1

Enable; drive TXCLK out OUT2 signal at

 

 

 

 

 

PORTC

Enables the transmitter clock to be driven on the OUT2 signal attached to PORTC port. When using the OUT2 signal, The PORTC pin must be configured as special function output.

Table 90: Serial Channel Bit-Rate register bit definition

2 4 6

N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v . D 0 3 / 2 0 0 6

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Digi NS7520 manual Transmit clock source, Drive receive clock external, Drive transmit clock external