Ethernet receive and transmit interrupts 40

Ethernet Receive Status register 174 Ethernet receiver considerations 145 Ethernet timing 296-297

Ethernet Transmit Status register 169 Ethernet transmitter considerations 144 exception entry/exit summary 38 exceptions

abort 32, 35 data abort 32, 35 definition 31 detail 34-36 FIRQ 32, 36

IRQ 32, 36

prefetch abort 32, 35 priorities 32

reset 32, 34 summary 32

SWI instruction 32 SWI interrupt 35 undefined 32, 34 exiting an exception 37

external CAM filtering 153 external DMA configuration 146 external DMA timing 300-302 external multiplexer 108

external oscillator mode hardware configuration 51

external oscillator vs. internal PLL circuit 49

external peripheral DMA support 145-147 external reset circuit source 59

F

fast interrupt request exception. See FIRQ exception.

FIFO management

receive FIFO interface 215 SPI 214

transmit FIFO interface 214 FIFO overrun condition 145 FIRQ 80

FIRQ exception 32, 36 FIRQ lines 39

fly-by mode, DMA buffer descriptor 130 fly-by transfers 128

FP DRAM 86

burst cycles 111

FP DRAM controller 109-111 single cycle read/write 110

FP DRAM timing 289-295

G

GEN module 61-83 configuration 62 hardware initialization 62 Interrupt Enable Clear 81 Interrupt Enable register 81 Interrupt Enable Set 81 Interrupt Status Enabled 81 Interrupt Status Raw 81 interrupts 80-83

PORTA configuration 75

PORTA Configuration register 74 PORTC configuration 78 PORTC Configuration register 77 Software Service register 70 System Control register 63 System Status register 68 Timer Control registers 70 Timer Status register 73

I n d e x - 4

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Digi NS7520 manual FP Dram