M

MAC Configuration register 1 178 MAC Configuration register 2 180 MAC module 154-155

MASK field 89, 97

Maximum Frame register 187 media access controller. See MAC. MEM module 85-125

A27 and A26 bit settings 92 BSIZE configuration 118

Chip Select Base Address register 93 Chip Select Option Register A 97 Chip Select Option Register B 101 configuration 88

DRAM module 109

EDO DRAM controller 109-111 FP DRAM controller 109-111 hardware initialization 86

Memory Module Configuration register 89

NS7520 DRAM address multiplexing 105-109

NS7520 SDRAM interconnect 112 peripheral page burst size 124 SDRAM 111-124

Mode register 119 read cycles 120 write cycles 122

SRAM controller 102-105

memory controller module. See MEM module.

memory management unit (MMU) 36 Memory Module Configuration register 89 memory space 89

memory timing control fields 97, 101 memory-to-memory mode

DMA buffer descriptor 130 external transfers 146

I n d e x - 6

memory-to-memory operation 129 MII Management Address register 194 MII Management Command register 193

MII Management Configuration register 191

MII Management Indicators register 197 MII Management Read Data register 196 MII Management Write Data register 195 multicast hash table entries 202

N

NET+ARM 1

NO CONNECT definition 11 pins 21

Non-Back-to-BackInter-Packet-Gap register 185

NS7520

ARM debugger 26 bootstrap initialization 60 chip select controller 16 clock module block diagrams 50 DRAM address multiplexing 105-109 Ethernet interface MAC 18 features 1-6

general-purpose I/O 21 JTAG test 26

NO CONNECT pins 21 operating frequency 6 packaging 7-9 pinout 7-28

power supply 28

SDRAM interconnect 112 system bus interface 12 system clock and reset 24 system mode 25

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Digi NS7520 manual Net+Arm