S e r i a l C h a n n e l r e g i s t e r s

Bits

Access

Mnemonic

Reset

Description

 

 

 

 

 

D10:00

R/W

NREG

0

N register

 

 

 

 

The N register value is determined by the

 

 

 

 

following equations. FBRG must be adjusted

 

 

 

 

according to the TMODE and TDCR/RDCR

 

 

 

 

settings. For a 16x setting, for example, FBRG

 

 

 

 

is 16 times the desired baud rate.

 

 

 

 

FBRG = FXTALE/[2*(N+1)

 

 

 

 

Using a CLKMUX setting of 00

 

 

 

 

FBRG = FSYSCLK/[2*(N+1)

 

 

 

 

Using a CLKMUX setting of 01

 

 

 

 

FBRG = FOUT1/[2*(N+1)

 

 

 

 

Using a CLKMUX setting of 10

 

 

 

 

FBRG = FOUT2/[2*(N+1)

 

 

 

 

Using a CLKMUX setting of 11

 

 

 

 

The maximum value for FOUT1 and FOUT2 is

 

 

 

 

FSYSCLK/4.

 

 

 

 

See Table 91: "Bit rate examples" on page

 

 

 

 

254 for sample bit rates.

 

 

 

 

 

Table 90: Serial Channel Bit-Rate register bit definition

Max baudrates with different clock sources

Max baud rates for the serial port depend on the clock source you are using.

With the 18.432MHz crystal using XTALE as the clock source:

FXTALE = xtal/5 = 18.432MHz/5 = 3.6864MHz

This does not change with speed grade.

16X

Fbrg = FXTALE/[2 * 16 * (N+1)]

 

115200 = 3686400/2*16*(N+1)

or

2*16*(N+1) = 3686400/115200

or

2*16*(N+1) = 32

or

N = 32/32-1 = 0

 

Max baudrate @ 16X = 115.2K

 

2 5 2

N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v . D 0 3 / 2 0 0 6

Page 266
Image 266
Digi NS7520 Max baudrates with different clock sources, With the 18.432MHz crystal using Xtale as the clock source, Nreg