S e r i a l C o n t r o l l e r M o d u l e

 

 

 

 

 

 

 

 

 

 

 

Bits

Access

Mnemonic

Reset

Description

 

 

 

 

 

 

 

D07:05

R/W

IE

0

Receiver interrupt condition

 

 

 

 

The interrupt enable bits are used to enable an

 

 

 

 

interrupt when the respective status bit is set

 

 

 

 

in Serial Channel Status A.

 

 

 

 

Setting the IE field to 1 enables the

 

 

 

 

interrupt.

 

 

 

 

Setting the IE field to 0 disables the

 

 

 

 

interrupt.

 

 

 

 

Table 86, “Receiver interrupt enable bits,” on

 

 

 

 

page 229, lists individual bit numbers and

 

 

 

 

descriptions.

 

 

 

 

 

 

D04:01

R/W

IE

0

Transmitter interrupt condition

 

 

 

 

The interrupt enable bits are used to enable an

 

 

 

 

interrupt when the respective status bit is set

 

 

 

 

in Serial Channel Status A.

 

 

 

 

Setting the IE field to 1 enables the

 

 

 

 

interrupt.

 

 

 

 

Setting the IE field to 0 disables the

 

 

 

 

interrupt.

 

 

 

 

Table 87, “Transmitter interrupt enable bits,”

 

 

 

 

on page 230, lists individual bit numbers and

 

 

 

 

descriptions.

 

 

 

 

 

 

D00

R/W

ETXDMA

0

Enable transmit DMA requests

 

 

 

 

Enables the transmitter to interact with a DMA

channel. When configured to operate in DMA mode, the DMA controller loads the transmit data FIFO from memory.

Clear this bit to pause the transmitter.

Table 85: Serial Channel Control Register A

Receiver interrupts

Bit

Mnemonic

Description

 

 

 

D15

ERXBRT

Receive break interrupt enable

 

 

 

D14

ERFE

Receive framing error interrupt enable

Table 86: Receiver interrupt enable bits

w w w . d i g i . c o m

2 2 9

Page 243
Image 243
Digi NS7520 Receiver interrupts, Receiver interrupt enable bits, Transmitter interrupt condition, Bit Mnemonic Description