Digi NS7520 manual 7 5 2 0 F e a t u r e s

N S 7 5 2 0 F e a t u r e s

Programmable timers

–Two independent timers (2μs–20.7 hours)

–Watchdog timer (interrupt or reset on expiration)

–Programmable bus monitor or timer

Operating frequency

–36, 46, or 55 MHz internal clock operation from 18.432 MHz quartz crystal or crystal oscillator

–fMAX = 36, 46, or 55 MHz (grade-dependent)

–System clock source by external quartz crystal or crystal oscillator, or clock signal

–Programmable PLL, which allows a range of operating frequencies from 10 to fMAX

–Maximum operating frequency from external clock or using PLL multiplication fMAX

Bus interface

–Five independent programmable chip selects with 256 Mb addressing per chip select

–All chip selects support SRAM, FP/EDO DRAM, SDRAM, flash, and EEPROM without external glue

–Supports 8-, 16-, and 32-bit peripherals

–External address decoding and cycle termination

–Dynamic bus sizing

–Internal DRAM/SDRAM controller with address multiplexer and programmable refresh frequency

–Internal refresh controller (CAS before RAS)

–Burst-mode support

–0–63 wait states per chip select

–Address pins that configure chip operating modes; see "NS7520 bootstrap initialization" on page 60.

4 N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v . D 0 3 / 2 0 0 6