E t h e r n e t M o d u l e

 

 

 

 

 

 

 

 

 

 

Bits

Access

Mnemonic

Reset

Description

 

 

 

 

 

D11

R

TXAED

0

Transmit abort — excessive deferral

 

 

 

 

Set to 1 to indicate that the last Ethernet packet

 

 

 

 

was not transmitted successfully; packet

 

 

 

 

transmission was aborted due to excessive

 

 

 

 

deferral. Excessive deferral means that there was a

 

 

 

 

receive carrier on the Ethernet channel for a long

 

 

 

 

period of time, making it impossible for the

 

 

 

 

transmitter to try to transmit.

 

 

 

 

When this bit is set, the transmit frame is

 

 

 

 

automatically flushed from the transmit FIFO.

 

 

 

 

TXREGE and TXFIFOH in the Ethernet General

 

 

 

 

Status register become active when the FIFO is

 

 

 

 

ready to start receiving the next packet.

 

 

 

 

TXBC in the Ethernet General Status register

 

 

 

 

becomes active when TXAED is set.

 

 

 

 

 

D10

R

TXAEC

0

Transmit abort — excessive collisions

 

 

 

 

Set to 1 to indicate that the last Ethernet packet

was not transmitted successfully; packet transmission was aborted due to an excessive number of collisions. The maximum number of collisions allowed is determined by the RETRY field in the Collisions Window/Collision Retry register.

When this bit is set, the transmit frame is automatically flushed from the transmit FIFO. TXREGE and TXFIFOH in the Ethernet General Status register become active when the FIFO is ready to start receiving the next packet.

TXBC in the Ethernet General Status register becomes active when TXAEC is set.

Table 58: Ethernet Transmit Status register bit definition

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Image 185
Digi NS7520 manual Txaed, Transmit abort excessive deferral, Txaec, Transmit abort excessive collisions