P i n o u t d e t a i l t a b l e s a n d s i g n a l d e s c r i p t i o n s

Mnemonic

Signal

Description

 

 

 

CAS0_

Column address strobe

Activated when an address is decoded by a chip

CAS1_

signals

select module configured for DRAM mode. The

CAS2_

 

CAS_ signals are active low and provide the

 

column address strobe function for DRAM devices.

CAS3_

 

 

The CAS_ signals also identify which 8-bit bytes of

 

 

 

 

the 32-bit data bus are active during any given

 

 

system bus memory cycle.

 

 

For SDRAM, CAS[3:1]_ provides the SDRAM

 

 

command field. CAS0_ provides the

 

 

auto-precharge signal.

 

 

For non-DRAM settings, these signals are 1.

 

 

 

WE_

Write enable

Active low signal that indicates that a memory

 

 

write cycle is in progress. This signal is activated

 

 

only during write cycles to peripherals controlled

 

 

by one of the chip selects in the memory module.

 

 

 

OE_

Output enable

Active low signal that indicates that a memory read

 

 

cycle is in progress. This signal is activated only

 

 

during read cycles from peripherals controlled by

 

 

one of the chip selects in the memory module.

 

 

 

Table 5: Chip select controller signal description

Ethernet interface MAC

Note: ENDEC values for general-purpose output and TXD refer to bits in the Ethernet General Control register. ENDEC values for general-purpose input and RXD refer to bits in the Ethernet General Status register.

In this table, GP designates general-purpose.

Symbol

 

Pin

I/O

OD

Description

 

 

 

 

 

 

 

 

MII

ENDEC

 

 

 

MII

ENDEC

 

 

 

 

 

 

 

MDC

GP output

D10

O

2

MII

State of (LPBK bit XOR

 

 

 

 

 

management

(Mode=SEEQ))

 

 

 

 

 

clock

 

 

 

 

 

 

 

 

MDIO

GP output

B10 U

I/O

2

MII data

State of UTP_STP bit

 

 

 

 

 

 

 

TXCLK

 

C10

I

 

TX clock

 

 

 

 

 

 

 

 

Table 6: Ethernet interface MAC pinout

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Digi NS7520 manual Ethernet interface MAC pinout