Digi NS7520 manual Memory-to-memory operation, DMA fly-by transfers

D M A M o d u l e

not touch this data; rather, it controls the flow of data through the BBus and provides the external address for a single data transfer operation. Figure 16 provides a simple representation of DMA fly-by mode:

Memory

Address

Data

DMA channel

Peripheral

DMA acknowledge

Figure 16: DMA fly-by transfers

Memory-to-memory operation

When configured for memory-to-memory (read-to-write) operations, the DMA controller uses a temporary holding register between read and write operations. Two memory cycles are executed — each read cycle is followed by a write cycle. Figure 17 provides a simple representation of DMA memory-to-memory mode:

Memory

Address	DMA channel
Data	Holding
	register
Data

Figure 17: DMA memory-to-memory transfer

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