Intel 815 manual 25. CR17CRT Mode Control, Word Mode or Byte Mode, CR146 CR176

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

R

9.6.25.CR17CRT Mode Control

I/O (and Memory Offset) Address:

3B5h/3D5h (index=17h)

Default:

0UU0 UUUUb (U=Undefined)

Attributes:

Read/Write

7

6

5

4

3

2

1

0

CRT Ctrl

Word or

Address

Reserved

Count By

Horizontal

Select

Compat

Reset

Byte Mode

Wrap

(0)

2

Retrace

Row Scan

Mode

Select

Cntr

Support

Bit

Description

7

CRT Controller Reset.

0

= Forces horizontal and vertical sync signals to be inactive. No other registers or outputs are affected.

1

= Permits normal operation.

6

Word Mode or Byte Mode.

0

= The memory address counter’s output bits are shifted by 1 bit position before being passed on to

the frame buffer address decoder such that they are made into word-aligned addresses when bit 6

of the Underline Location Register (CR17) is set to 0.

1

= The memory address counter’s output bits remain unshifted before being passed on to the frame

buffer address decoder such that they remain byte-aligned addresses when bit 6 of the Underline

Location Register (CR17) is set to 0.

Note that this bit is used in conjunction with bits 6 and 5 of the CRT Mode Control Register (CR17) to

control how frame buffer addresses from the memory address counter are interpreted by the frame

buffer address decoder as shown below:

CR14[6]

CR17[6]

Addressing Mode

0

0

Word ModeAddresses from the memory address counter are shifted once

to become word-aligned

0

1

Byte ModeAddresses from the memory address counter are not shifted

1

0

DWord ModeAddresses from the memory address counter are shifted

twice to become DWord-aligned

1

1

DWord ModeAddresses from the memory address counter are shifted

twice to become DWord-aligned

5

Address Wrap. Note that this bit is only effective when word mode is made active by setting bit 6 in

both the Underline Location Register and this register to 0.

0

= Wrap frame buffer address at 16 KB. This is used in CGA-compatible modes.

1

= No wrapping of frame buffer addresses.

4

Reserved. Read as 0s.

127