Intel 815 manual Value .bit

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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Bit		Description
8	DDDA Direction Mask—R/W: This is a mask bit to determine whether the GPIO DIRECTION VALUE
	bit should be written into the register.
	0	= Do NOT write DDDA Direction Value bit (default).
	1	= Write DDDA Direction Value bit.
7:5	Reserved
4	DDCK Data In—RO:This is the value that is sampled on the DDCK pin as an input.
	The Data In bits [12], [4] of the GPIOA register are read only, however, data is only latched into these
	bits when a write is done to the respective bytes of the GPIOA register. Thus a read of the Data In bits
	must be preceded with a dummy write.
3	DDCK Data Value—R/W:This is the value that should be place on the DDCK pin as an output. This
	value is only written into the register if DDCK DATA MASK is also asserted. The value will appear on
	the pin if this data value is actually written to this register and the DDCK DIRECTION VALUE contains
	a value that will configure the pin as an output.
2	DDCK Data Mask—R/W:This is a mask bit to determine whether the DDCK DATA VALUE bit should
	be written into the register.
	0	= Do NOT write DDCK Data Value bit (default).
	1	= Write DDCK Data Value bit.
1	DDCK Direction Value—R/W:This is the value that should be used to define the ouput enable of the
	GPIO0 pin. This value is only written into the register if DDCK DIRECTION MASK is also asserted.
	The value that will appear on the pin is defined by what is in the register for the DDCK DATA
	VALUE.bit.
	0	= Pin is configured as an input (default)
	1	= Pin is configured as an output.
0	GPIO0 Direction Mask—R/W: This is a mask bit to determine whether the GPIO DIRECTION VALUE
	bit should be written into the register.
	0	= Do NOT write DDCK Direction Value bit (default).
	1	= Write DDCK Direction Value bit.

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