Intel manual Intel 815 Chipset Graphics Controller PRM, Rev

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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•Other registers that should restore only certain bits from the saved-state values:

Bit Blit Control MM 0x7000c

Read the current value of the Bit Blit Control Register.

Clear the bits pertaining to the Color Expansion Mode (bits 5:4).

OR–in the saved value of the Bit Blit Control Register.

Write the result back into the Bit Blit Control Register.

Display Control Field MM 0x70008

Read the current value of the Display Control Register.

OR–in the saved value of the Display Control Register.

Write the result back into the Display Control Register.

Pixel Pipeline Configuration 0 Field MM 0x70009

Read the current value of the Pixel Pipeline Configuration 0 Register.

Save reserved bits 6:5 and 2. Clear all other bits.

OR–in the saved value of the Pixel Pipeline Configuration 0 Register.

Write the result back into the Pixel Pipeline Configuration 0 Register.

Pixel Pipeline Configuration 2 Field MM 0x7000b

Read the current value of the Pixel Pipeline Configuration 2 Register.

Save reserved bits 7:4 and 1:0. Clear all other bits.

OR–in the saved value of the Pixel Pipeline Configuration 2 Register.

Write the result back into the Pixel Pipeline Configuration 2 Register.

Pixel Pipeline Configuration 1 Field MM 0x7000a

Read the current value of the Pixel Pipeline Configuration 1 Register.

Clear the Display Color Mode bit (bits 3:0).

OR–in the saved value of the Pixel Pipeline Configuration 1 Register.

Write the result back into the Pixel Pipeline Configuration 1 Register.

Hardware Status Mask Register MM 0x2098

Read the current value of the Hardware Status Mask Register.

Clear everything but the reserved bits (14:13).

OR–in the saved value of the Hardware Status Mask Register.

Write the result back into the Hardware Status Mask Register.

Interrupt Enable Register MM 0x20A0

Read the current value of the Interrupt Enable Register.

Clear everything but the reserved bits (14:13).

OR–in the saved value of the Interrupt Enable Register.

Write the result back into the Interrupt Enable Register.

Interrupt Mask Register MM 0x20A8

Read the current value of the Interrupt Mask Register.

Clear everything but the reserved bits (14:13).

OR–in the saved value of the Interrupt Mask Register.

Write the result back into the Interrupt Mask Register.

Error Mask Register MM 0x20B4

Read the current value of the Error Mask Register.

Clear everything but the reserved bits (15:6).

OR–in the saved value of the Error Mask Register.

Write the result back into the Error Mask Register.

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