Intel 815 manual 12.3.10. BR09-Destination Address and Destination Y1 Address

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Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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12.3.10. BR09—Destination Address and Destination Y1 Address

Memory Offset Address:

40024h

Default:

 

 

None

Attributes:

 

 

RO; DWord accessible

31

 

26

25

0

 

 

 

Reserved. Must

 

Destination and Destination Y1 and Y Address Bits [25:0]

 

 

 

be Zero

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

Descriptions

 

 

 

 

 

 

 

31:26

 

Reserved. Must be Zero.

 

 

 

 

 

 

 

25:0

 

Destination and Destination Y1 and Y Address Bits. These 26 bits specify the starting pixel

 

 

 

 

address of the destination data. This register is also the working destination address register and

 

 

 

 

changes as the BLT Engine performs the accesses.

 

 

 

 

Used as the scan line address (Destination Y Address & Destination Y1 Address) for BLT instructions:

 

 

 

 

PIXEL_BLT, SCANLINE_BLT, and TEXT_BLT. In this case the address points to the first pixel in a

 

 

 

 

scan line and is compared with the ClipRect Y1 & Y2 address registers to determine whether the scan

 

 

 

 

line should be written or not. The Destination Y1 address is the top scan line to be written for text.

 

 

 

 

This register is always the last register written for a BLT drawing instruction. Writing BR09 starts the

 

 

 

 

BLT engine execution.

 

 

 

 

 

 

Note:

 

 

 

 

 

 

 

Some instructions affect only one scan line (requiring only one coordinate); other instructions affect

 

 

 

 

multiple scan lines and need both coordinates.

 

 

 

 

NOTES:

This is a working register. If BR09 is read while the BLT engine is busy, the contents are unpredictable.

12.3.11. BR10—Destination Y2 Address

Memory Offset Address:

40028h

Default:

 

 

None

Attributes:

 

 

RO; DWord accessible

31

 

26

25

0

 

 

 

Reserved. Must

 

Destination Y2 Address Bits [25:0]

 

 

 

be Zero

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

Descriptions

 

 

 

 

 

31:26

 

Reserved. Must be Zero. The maximum GC graphics address is 64 MBs. Debug implementation

 

 

 

 

specific = bmtdpix[5:0]

 

 

 

 

 

 

 

25:0

 

Destination Y2 Address. Used as the scan line address (Destination Y2 Address) for BLT instruction:

 

 

 

 

TEXT_BLT. The address points to the first pixel in a scan line and is compared with the ClipRect Y1 &

 

 

 

 

Y2 address registers to determine whether the scan line should be written or not. The Destination Y2

 

 

 

 

address is the bottom scan line to be written for text.

 

 

 

 

 

 

 

 

193

Page 193
Image 193
Intel 815 manual 12.3.10. BR09-Destination Address and Destination Y1 Address, 12.3.11. BR10-Destination Y2 Address