Intel 815 manual Contents

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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Contents

1.	Introduction				15
	1.1.	Terminology			15
	1.2.	Reference Documents			16
2.	Intel® 815 Chipset Overview				17
	2.1.	I/O Controller Hub			18
	2.2.	Intel® 82815 Chipset GMCH Overview			18
		2.2.1.	Host Interface		19
		2.2.2.	System Memory Interface		20
		2.2.3.	Multiplexed AGP and Display Cache Interface		20
		2.2.4.	Hub Interface		21
		2.2.5.	Intel® 82815 Chipset GMCH Integrated Graphics Support		21
		2.2.6.	System Clocking		22
		2.2.7.	GMCH Power Delivery		22
	2.3.	Three PCI Devices on GMCH			22
		2.3.1.	Multi-Mode Capability Requirements		23
			2.3.1.1. Supported Single Monitor and Multi-monitor Configurations		23
			2.3.1.2.	System Startup	25
			2.3.1.3.	Software Start-Up Sequence	26
			2.3.1.4.	Switching Device modes	28
3.	System Address Map				29
	3.1.	Memory and I/O Space Registers			30
	3.2.	GC Register Memory Address Map			32
	3.3.	VGA and Extended VGA Register Map			36
		3.3.1.	VGA and Extended VGA I/O and Memory Register Map		37
	3.4.	Indirect VGA and Extended VGA Register Indices			38
		3.4.1.	Graphics Address Translation		41
		3.4.2.	Memory Buffers for GC’s Instruction Interface		42
4.	Graphics Translation Table (GTT) Range Definition				43
5.	Basic Initialization Procedures				45
	5.1.	Initialization Sequence			45
	5.2.	Hardware Detection (Probe)			45
	5.3.	Frame Buffer Initialization			46
	5.4.	Hardware Register Initialization			47
		5.4.1.	Color vs. Monochrome Monitors		47
		5.4.2.	Protect Registers: Locking and Unlocking		47
		5.4.3.	Checking Memory Frequency		47
	5.5.	Hardware State			47
	5.6.	Saving the Hardware State			48
	5.7.	Restoring the Hardware State			49
6.	Blt Engine Programming				53
	6.1.	BLT Engine Programming Considerations			53
		6.1.1.	When the Source and Destination Locations Overlap		53
	6.2.	Basic Graphics Data Considerations			57
		6.2.1.	Contiguous vs. Discontinuous Graphics Data		57

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