Intel 815 manual Batch Buffers, Batch Buffer Sequence

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Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

R

Software is required to use some mechanism to track instruction execution progress to determine the free space in the RB. This can be:

A direct read of the Head Pointer register

The automatic reporting of the Head Pointer register

The explicit reporting of the Head Pointer register via the GFXCMDPARSER_REPORT_HEAD instruction

Some other "implicit" means by which software can determine how far the IP has progressed in retiring instructions from an RB. This could include the use of "Store DWORD" instructions to write sequencing data to system memory.

Once the instructions have been written (and padded out to a QWord, if necessary), software can write the Tail Pointer register to submit the new instructions for execution.

10.4.5.Batch Buffers

The GC provides for the execution of instruction sequences external to RBs. These sequences are called batch buffers, and are initiated through the use of GFXCMDPARSER_BATCH_BUFFER instructions that specify the starting address and length of the batch buffers. The arbitration rules used by the IP when executing batch buffers differ from those employed when executing RBs, and are described later in this chapter. When a batch buffer instruction is executed out of a RB, a batch buffer sequence is initiated where the GC reads the instructions sequentially (via DMA) from the batch buffer.

What happens when the end of the batch buffer is reached depends on the final instruction in the buffer. If the final instruction is a GFXCMDPARSER_BATCH_BUFFER instruction, another batch buffer sequence is initiated. This process, called "chaining", continues until a batch buffer terminates with an instruction other than GFXCMDPARSER_BATCH_BUFFER, at which point execution will resume in the RB at the instruction following the initial GFXCMDPARSER_BATCH_BUFFER.

Figure 28. Batch Buffer Sequence

Buffer

Chaining

Buffer

Chaining

Instruction

 

From Ring Buffer

 

Instruction

 

 

Batch Buff Instr

Instruction

Instruction

Batch Buff Instr

Instruction

Instruction

Instruction

Return to Ring Buf

btch_buf.vsd

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Page 146
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Intel 815 manual Batch Buffers, Batch Buffer Sequence