Intel 815 manual INITPH-Initial Phase Register, Bit Description

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

R

15.4.3.4.INIT_PH—Initial Phase Register

Memory Address Offset:				28h (R/W)
On-chip Reg. Mem Addr Offset:				30128h (RO; debug path)
Default Value:				00h
Access:				see address offset above
Size:				32 bits
31				6	5	0
			Reserved		Initial Phase minus one
		Bit		Description
	31:6		Reserved.
	5:0		Initial Phase minus one. These bits provide a method of creating a negative initial phase. If the
			corresponding bit is set, the initial phase is the register value minus one. These bits should only be set
			in cases where the buffer pointer is pointing to the first pixel of the line or column because it will
			effectively cause the first pixel to be duplicated.
	5		Y Vertical Buffer / Field 0
	4		Y Vertical Buffer / Field 1
	3		Y Horizontal
	2		UV Vertical Buffer / Field 0
	1		UV Vertical Buffer / Field 1
	0		UV Horizontal

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