Intel 815 manual 12.3.16. BR15-Color Pattern Address

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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12.3.16. BR15—Color Pattern Address

Memory Offset Address:				4003Ch
Default:				None
Attributes:				RO; DWord accessible
31			26	25		16
			Reserved. Must be Zero	Color Pattern Address Bits [25:16]
15				6	5	0
			Color Pattern Address Bits [15:6]			Reserved. Must be Zero
		Bit		Descriptions
	31:26		Reserved. Must be Zero. The maximum GC graphics address is 64 MBs.
	25:6		Color Pattern Address. These 20 bits specify the starting address of the pattern.
			The pattern data must be located on a pattern-size boundary. The pattern is always of 8x8 pixels, and
			therefore, its size is dependent upon its pixel depth. The pixel depth may be 8, 16, or 24 bits per pixel if
			the pattern is in color (the pixel depth of a color pattern must match the pixel depth to which the graphics
			system has been set). Monochrome patterns require 8 bytes and is supplied through the instruction.
			Color patterns of 8, 16, and 24 bits per pixel color depth must start on 64-byte, 128-byte and 256-byte
			boundaries, respectively.
			Note:
			In the case of 24 bits per pixel, each scan line’s worth (each row of 8 pixels) of pattern data takes up 32
			consecutive bytes, not 24. It is formatted so that there is a contiguous block of 8 sets of 3 bytes, each
			corresponding to 1 of the 8 pixels, followed by a contiguous block of the 8 extra bytes. When the BLT
			Engine reads 24 bit-per-pixel pattern data, it will read only the first 24 bytes of each scan line’s worth of
			data, picking up the 8 sets of 3 bytes for each of the 8 pixels, and entirely ignoring the remaining 8
			bytes.
	5:0		Reserved. Must be Zero. These bits always return 0 when read.

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