Intel 815 manual Pixelblt, Instruction Target Opcode 20h, Instruction Target Opcode 21h

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Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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12.2.3.PIXEL_BLT

The Destination X coordinate and Destination Y Address is compared with the ClipRect registers. If it is within all 4 comparisons, then the pixel supplied in the SETUP_BLT instruction is written with the raster operation to (Destination Y Address + Destination X coordinate * bytes per pixel).

DWord

Bit

Description

 

 

 

0 = BR00

31:29

Client : 02h – 2D Processor

 

 

 

 

28:22

Instruction Target (Opcode) : 20h

 

 

 

0 = BR08

21:06

Destination X Coordinate: (17:06 = 12 bits are implemented in the Intel® 815 chipset)

 

05

Reserved. Must be Zero

 

 

 

0

04:00

Dword Length : 00h

 

 

 

1 = BR09

31:00

Destination Y Address: (address of the first pixel on a scan line) (25:00 are

 

 

implemented in Intel® 810 chipset)

12.2.4.SCANLINE_BLT

The Destination Y Address is compared against the ClipRect Y address registers. If the address is within this comparison, then the pattern pixels dependent on the Destination X coordinates that fall within the ClipRect X comparisons are written using the raster operation to (Destination Y Address + Destination X coordinate * bytes per pixel). The horizontal alignment is relative to the destination from the lower bits of the destination address. The pattern vertical alignment indicates which pattern scan line is used (this is the least significant three bits of the destination vertical coordinate). With color patterns only 1 scan line should be read for this instruction.

Solid pattern should use the SETUP_MONO_PATTERN_SL_BLT instruction.

DWord

Bit

Description

 

 

 

0 = BR00

31:29

Client : 02h – 2D Processor

 

 

 

 

28:22

Instruction Target (Opcode) : 21h

 

 

 

 

21:08

Reserved. Must be Zero

 

 

 

 

07:05

Pattern Vertical Alignment: (which scan line of the 8x8 pattern to start on)

 

 

 

 

04:00

Dword Length : 01h

 

 

 

1 = BR08

31:16

Destination X2 Coordinate: (Ending - Right)

 

 

(Intel® 815 chipset implementation supports 27:16 = 12 bits)

 

15:00

Destination X1 Coordinate: (Starting - Left) - X2 - X1 + 1 = width in pixels

 

 

(Intel® 815 chipset implementation supports 11:00 = 12 bits)

2 = BR09

31:00

Destination Y Address: (address of the first pixel on a scan line)

 

 

(25:00 is implemented inIntel® 810 chipset)

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Page 167
Image 167
Intel 815 Pixelblt, Instruction Target Opcode 20h, Instruction Target Opcode 21h, Destination X2 Coordinate Ending Right