Intel 815 manual Patblt, Instruction Target Opcode 41h

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Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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12.2.8.PAT_BLT

PAT_BLT is used when there is no source and the color pattern is not trivial (is not a solid color only).

The whole color pattern (8 x 8 pixels = 16, 32, or 64 DWs) is read at the beginning of the BLT and stored in the Texture Cache. The pattern vertical alignment specifies the first scan line of the pattern that is used. The horizontal alignment is relative to the destination from the lower bits of the destination address.

The only memory accesses required for the remainder of the BLT is destination accesses, which is dependent on the raster operation.

Only a positive destination pitch is allowed.

DWord

Bit

Description

 

 

 

0 = BR00

31:29

Client : 02h – 2D Processor

 

 

 

 

28:22

Instruction Target (Opcode) : 41h

 

 

 

 

21:08

Reserved. Must be Zero

 

 

 

 

07:05

Pattern Vertical Alignment: (which scan line of the 8x8 pattern to start on)

 

 

 

 

04:00

Dword Length : 03h

 

 

 

1 = BR13

31:28

Reserved. Must be Zero

 

 

 

 

27

Reserved. Must be Zero

 

 

 

 

26

Must Be One (‘1’).

 

 

 

 

25:24

Color Depth:

 

 

00 = 8 bit color

 

 

01 = 16 bit color

 

 

10 = 24 bit color

 

 

11 = reserved

 

 

 

 

23:16

Raster Operation:

 

 

 

 

15:00

Destination Pitch (positive): (13:00 are implemented in Intel® 810 chipset)

2 = BR14

31:16

Destination Height (in scan lines): (28:16 are implemented in Intel® 810 chipset)

 

15:00

Destination Width (in bytes): (12:00 are implemented in Intel® 810 chipset)

3 = BR09

31:00

Destination Address: Address of the first byte to be written

 

 

(25:00 are implemented in Intel® 810 chipset)

4 = BR15

31:00

Pattern Address: (25:06 are implemented in Intel® 810 chipset)

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Page 171
Image 171
Intel 815 manual Patblt, Instruction Target Opcode 41h