Intel 815 manual Ring Buffer Initialization, Ring Buffer Use, Characteristic Description

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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•Head Wrap Count: This field is incremented by the IP every time the Head Offset wraps back to the start of the buffer. As it is included in the DWord written in the "report head" process, software can use this field to track IP progress as if the RB had a "virtual" length of 2048 times the size of the actual physical buffer.

•Tail Offset: This is the QWord offset (from Start Address) where software will write the next instruction. After writing instructions into the RB, software updates the Tail Offset field in order to submit the instructions for execution (by setting it to the QWord offset immediately following the last instruction to be submitted). The instructions submitted can wrap from the end of the buffer back to the top, in which case the Tail Offset written will be less than the previous value. Note that, since the RB empty condition is defined as "Head Offset == Tail Offset", software has to leave at least one QWord free at all times (i.e., the buffer is considered full when only one QWord is free).

•Automatic Report Head Enable: Software can request to have the hardware Head Pointer register contents written ("reported") to snooped system memory on a periodic basis. This is desirable as software needs to use the Head Offset to determine the amount of free space in the RB -- and having the Head Pointer periodically reported to system memory provides a fairly accurate Head Offset value automatically (i.e., without having to explicitly store a Head Offset value via an instruction). The Head Pointer register will be stored at an RB-specific displacement into the "hardware status page" (defined by the HWSTAM register).

Table 12.	Ring Buffer Characteristics
	Characteristic	Description
	Alignment	4 KB page aligned
	Max Size	2 MB
	Length	Programmable in numbers of 4 KB pages
	Start Pointer	Programmable page aligned address of the buffer
	Head pointer	Programmable to initially setup ring
		Hardware maintained DWord Offset in the ring buffer. Pointer wraps
	DMA pointer	Hardware maintained DMA request Double QWord Offset. Pointer wraps
	Tail pointer	Programmable Double QWord Offset in the ring buffer.

10.4.4.2.Ring Buffer Initialization

Before initializing a RB, software must first allocate the desired number of 4 KB pages for use as buffer space. Then the RINGBUF registers associated with the RB are programmed. Once the Ring Buffer Valid bit is set, the RB will be considered for instruction arbitration, and the Head and Tail Offsets will either indicate an empty RB (i.e., Head == Tail), or will define some number of instructions to be executed.

10.4.4.3.Ring Buffer Use

Software can write new instructions into the "free space" of the RB, starting at the Tail Offset and up to (but not including) the QWord prior to the QWord indicated by the Head Offset. (Recall that software must leave at least one QWord empty in the RB at all times). Note that this "free space" may wrap from the end of the RB back to the start.

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