Intel 815 manual Gpio Registers, GPIOAGeneral Purpose I/O Control Register a

Models: 815

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Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

R

19.2.GPIO Registers

19.2.1.GPIOAGeneral Purpose I/O Control Register A

Address offset :

05010h

Default value :

00h, 00h, 000U0000b, 000U0000b

Access :

Read / write

Size :

32 bit

This register controls the general purpose I/O pins DDCK and DDDA, which are used to create a Display Data Channel (DDC) serial bus for communication with an external analog display monitor.

 

31

 

 

 

 

 

 

16

 

 

 

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

13

 

12

11

10

9

8

 

 

 

Reserved

 

DDDA

DDDA

DDDA

DDDA

DDDA

 

 

 

 

 

Data In

Data value

Data Mask

Direction

Direction

 

 

 

 

 

 

 

 

value

Mask

 

 

 

 

 

 

 

 

 

 

 

 

7

5

 

4

3

2

1

0

 

 

 

Reserved

 

DDCK

DDCK

DDCK

DDCK

DDCK

 

 

 

 

 

Data In

Data value

Data Mask

Direction

Direction

 

 

 

 

 

 

 

 

value

Mask

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31:16

Reserved.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15:13

Reserved.

 

 

 

 

 

 

 

 

 

 

 

 

12

DDDA Data In—RO:This is the value that is sampled on the DDDA pin as an input.

 

 

 

 

The Data In bits [12], [4] of the GPIOA (GPIOB) register are read only, however, data is only latched

 

 

into these bits when a write is done to the respective bytes of the GPIOA (GPIOB) register. Thus a

 

 

read of the Data In bits must be preceded with a dummy write.

 

 

 

 

 

 

 

11

DDDA Data Value—R/W:This is the value that should be place on the DDDA pin as an output. This

 

 

value is only written into the register if DDDA DATA MASK is also asserted. The value will appear on

 

 

the pin if this data value is actually written to this register and the DDDA DIRECTION VALUE contains

 

 

a value that will configure the pin as an output.

 

 

 

 

 

 

 

 

10

DDDA Data Mask—R/W:This is a mask bit to determine whether the DDDA DATA VALUE bit should

 

 

be written into the register.

 

 

 

 

 

 

 

 

0 = Do NOT write DDDA Data Value bit (default).

 

 

 

 

 

 

1 = Write DDDA Data Value bit.

 

 

 

 

 

 

 

 

 

 

9

DDDA Direction Value—R/W:This is the value that should be used to define the ouput enable of the

 

 

DDDA pin. This value is only written into the register if DDDA DIRECTION MASK is also asserted. The

 

 

value that will appear on the pin is defined by what is in the register for the DDDA DATA VALUE.bit.

 

 

0 = Pin is configured as an input (default)

 

 

 

 

 

 

 

1 = Pin is configured as an output.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Page 348
Image 348
Intel 815 manual Gpio Registers, GPIOAGeneral Purpose I/O Control Register a