Intel 815 manual Hardware Register Initialization, Hardware State, Color vs. Monochrome Monitors

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

R

5.4.Hardware Register Initialization

5.4.1.Color vs. Monochrome Monitors

The mapping and initialization of some hardware registers depends in part on whether the graphics adapter is attached to a monochrome or color monitor. The following steps illustrate how to determine the type of output device attached to the graphics adapter:

•Read the Miscellaneous Output Register (0x3CC).

•Test the low-order bit of the Miscellaneous Output Register, and interpret it as follows:

0: The adapter is in monochrome monitor mode. In this mode, the control register is 3B4 and 3B5, and status is at 3BA.

1: The adapter is in color monitor mode. In this mode, the control register is 3D4 and 3D5, and status is at 3DA.

See the section on VGA compatibility for a description of the register space that must be acquired.

5.4.2.Protect Registers: Locking and Unlocking

To make use of some protected VGA registers, a locking and unlocking mechanism needs to be implemented. The following steps illustrate how to unlock (or unprotect) the VGA registers:

•Send a VERT_SYNC_END value to the register at vgaBase + 4.

•Read the value in the register at vgaBase + 5.

•Clear the high-order bit of the value just read.

•Write the resulting value back into the register at vgaBase + 5.

5.4.3.Checking Memory Frequency

The driver behavior occasionally must be modified, depending on the frequency at which the memory is running. The following steps illustrate how to determine the local memory frequency:

•Read the contents of the Intel® 82815 chipset Configuration Register (PCI address space 0x50).

•Examine the value of bit 4.

•The value is interpreted as follows:

0: Frequency is 100 MHz.

1: Frequency is 133 MHz.

5.5.Hardware State

Under certain conditions, it may be necessary to save and restore the hardware state of the graphics adapter. These conditions include mode switching, output device switching, processing changes in power state, and others. The next two sections provide a brief description of the state saving and restoration requirements.

47