Intel 815 OBUF1Y-Overlay Buffer 1 Y Pointer Register, OBUF0U-Overlay Buffer 0 U Pointer Register

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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15.4.1.2.OBUF_1Y—Overlay Buffer 1 Y Pointer Register

Memory Address Offset:					04h (R/W)
On-chip Reg. Mem Addr Offset:					30104h (RO; debug path)
Default Value:					00h
Access:					see address offset above
Size:					32 bits
31			26	25	0
			Reserved		Overlay Buffer 1 Y Pointer
		Bit			Description
	31:26		Reserved.
	25:0		Overlay Buffer 1 Y Pointer. For Y Planar or packed color data (byte address). Must be pixel aligned
			(low order bit zero for 16-bpp packed formats). When mirroring horizontally (X backwards), this points
			to the last byte of the line.

15.4.1.3.OBUF_0U—Overlay Buffer 0 U Pointer Register

Memory Address Offset:					08h (R/W)
On-chip Reg. Mem Addr Offset:					30108h (RO; debug path)
Default Value:					00h
Access:					see address offset above
Size:					32 bits
31			26	25	0
			Reserved		Overlay Buffer 0 U Pointer
		Bit			Description
	31:26		Reserved.
	25:0		Overlay Buffer 0 U Pointer. This register is used for YUV Planar Modes only. It points to the start of
			the U addresses in the interleaved UV formats (byte address).

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