Intel 815 manual LCD / TV-Out Register Description, HTOTAL-Horizontal Total Register

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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17.LCD / TV-Out Register Description

During LCD or TV-Out mode, the BIOS will program the following LCD / TV-Out registers. These registers are 32-bit memory mapped. These registers are not double buffered and take effect when loaded. Further, this subsystem takes into account modified CR register values during vertical blank time for centering.

This subsystem allows the timing generator to be programmed to pixel granularity. The only exception is during VGA pixel doubling mode. During VGA pixel doubling, active pixel time must be a multiple of 4 pixels to account for centering with VGA pixel doubling and non-active times must be a multiple of 2 pixels clocks.

All fields are excess-0 encoded. This means that the hardware uses the value+1, where value is the entry in the field. Therefore if a 0 is programmed into a field the hardware uses the value 1 for that field.

17.1.HTOTAL—Horizontal Total Register

Address Offset:					60000h
Default Value:					00000000h
Access:					Read/Write
Size:					32 bits
31			28	27		16
			Reserved		Horizontal Total Display Pixels
15				11	10	0
			Reserved		Horizontal Active Display Pixels
		Bit			Description
	31:28		Reserved.
	27:16		Horizontal Total Display Pixels. This 12-bit field provides a horizontal total up to 4096 pixels
			encompassing 2048 active display pixels, front/back border pixels and horizontal retrace period. Any
			pending event (HSYNC, VSYNC) is reset at htotal.
	15:11		Reserved.
	10:0		Horizontal Active Display Pixels. This 11-bit field provides horizontal active display resolutions up to
			2048 pixels. Note that the first horizontal active display pixel always starts at 0.

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