Intel 815 manual Frame Buffer Initialization

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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Once the operating system has identified the device, it can load the appropriate driver.

One of the first tasks of the driver is to make sure that the device matches the driver. Checking that the driver and device match is done in much the same way that the operating system identifies the graphics adapter. That is, the PCI VendorId and ProductId values are examined. Some operating systems will make available to the driver the values it found during its scan. If not, the driver must scan the PCI space until it finds a match on the VendorId and ProductId values. The driver normally caches this information so that it is accessible by other driver modules, when needed.

The next task of the device driver is to ensure that required resources are present. These resources include the minimum memory requirements, IO address space requirements, and operating system support requirements (such as GART support). If the driver detects that the operating system or the physical hardware does not meet the driver’s minimum requirements, the driver should not load. The operating system should then be able to make use of the graphics adapter in its VGA- and VESA- compliant mode.

If the operating system and hardware support are present, the driver should acquire the blocks of memory and IO address space that will be required. These blocks should include at least the following:

•Memory-mapped IO address space: 512 KB beginning at 0x80000

•Linear frame buffer space: 32 or 64 MB beginning at 0xFE000000

•Legacy IO addresses to support monochrome or color monitors

•VGA IO addresses

5.3.Frame Buffer Initialization

The frame buffer initialization is responsible for setting up the memory that will contain the display data. Other objects also can be stored in display memory.

The following steps should be performed:

•Map a 0x80000-byte region in memory to the MMIO base address. The base address of the memory-mapped region should be programmed into the MMADDR register, offset 14 in the PCI address space.

•Allocate enough memory for the frame buffer from a memory pool created during initialization. The amount of memory is determined by system characteristics, but should default to at least 8 MB.

•If a hardware cursor is being used, allocate memory for the hardware cursor from the same memory pool. The hardware does not use the GART to access the memory for the cursor, so local-to- physical memory address translation must be performed. The hardware cursor memory address should be programmed into the CURBASE register, memory-mapped address 70084h.

•The low-priority ring buffer memory should be initialized to 0. The low-priority ring buffer pointers should be programmed into the ring buffer pointer registers, RINGBUF, which begin at offset 2030h in the memory-mapped IO space.

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