Intel 815 manual GFXRENDERSTATEBOOLEANENA2, 3DState24 04h

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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13.20.GFXRENDERSTATE_BOOLEAN_ENA_2

DWord	Bit	Description
0	31:29	Client : 03h – Render Processor
	28:24	3DState24 : 04h
	23:18	Reserved : 00h
	17	Mapping Cache Enable Mask : 1 = Update; 0 = Do Not Update
	16	Mapping Cache Enable : 1 = Enable, 0 = Disable (default)
		Any change made to the Mapping Cache Enable state variable must be followed by a
		GFXCMDPARSER_FLUSH instruction to cause the hardware to flush the 3D pipeline.
	15	Alpha Dither Enable Mask : 1 = Update; 0 = Do Not Update
	14	Alpha Dither Enable : 1 = Enable, 0 = Disable (default)
	13	Fog Dither Enable Mask : 1 = Update; 0 = Do Not Update
	12	Fog Dither Enable : 1 = Enable, 0 = Disable (default)
	11	Specular Dither Enable Mask : 1 = Update; 0 = Do Not Update
	10	Specular Dither Enable : 1 = Enable, 0 = Disable (default)
	9	Color Dither Enable Mask : 1 = Update; 0 = Do Not Update
	8	Color Dither Enable: 1 = Enable, 0 = Disable (default)
	7:4	Reserved: 0h
	3	Frame Buffer Write Enable Mask : 1 = Update; 0 = Do Not Update
	2	Frame Buffer Write Enable : 1 = Enable, 0 = Disable (default)
	1	Z Buffer Write Enable Mask : 1 = Update; 0 = Do Not Update
	0	Z Buffer Write Enable : 1 = Enable, 0 = Disable (default)

The frame buffer write enable feature can be used to reliably render coplanar (layered) polygons. An example of this type of layering would be to render a window on a wall. With a 16-bit z buffer, there is not sufficient precision to render this type of scene with consistent priority. Some pixels of the window will be intermixed with some pixels of the wall, due to precision inaccuracies.

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