Intel 815 manual Ssladd

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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Table 2.	Memory-Mapped Registers
	Address Offset	Symbol		Register Name	Access
		BLT Engine Status (40000h−4FFFFh) (Software Debug)
	40000h–40003h	BR00		BLT Opcode and Control	RO
	40004h–40007h	BR01		Setup BLT Raster OP, Control, and Destination	RO
				Offset
	40008h–4000Bh	BR02		Clip Rectangle Y1 Address	RO
	4000Ch–4000Fh	BR03		Clip Rectangle Y1 Address	RO
	40010h–40013h	BR04		Clip Rectangle X1 and X2 Address	RO
	40014h–40017h	BR05		Setup Expansion Background Color	RO
	40018h–4001Bh	BR06		Setup Expansion Foreground Color	RO
	4001Ch–4001Fh	BR07		Setup Color Pattern Address	RO
	40020h–40023h	BR08		Destination X1 and X2	RO
	40024h–40027h	BR09		Destination Address and Destination Y1 Address	RO
	40028h–4002Bh	BR10		Destination Y2 Address	RO
	4002Ch–4002Fh	BR11		BLT Source Pitch (Offset) or Monochrome Source	RO
				Quadwords
	40030h–40033h	BR12		Source Address	RO
	40034h–40037h	BR13		BLT Raster OP Control, and Destination Pitch	RO
	40038h–4003Bh	BR14		Destination Width and Height	RO
	4003Ch–4003Fh	BR15		Color Pattern Address	RO
	40040h–40043h	BR16		Pattern Expansion Background and Solid Pattern	RO
				Color
	40044h–40047h	BR17		Pattern Expansion Foreground Color	RO
	40048h–4004Bh	BR18		Source Expansion Background and Destination Colr	RO
	4004Ch–4004Fh	BR19		Source Expansion Foreground Color	RO
	40074h–40077h	SSLADD		Source Scan Line Address	RO
	40078h–4007Bh	DSLH		Destination Scan Line Height	RO
	4007Ch–4007Fh	DSLRADD		Destination Scan Line Read Address	RO
	40080h–4FFFFh			Reserved	
			Reserved (50000h–5FFFFh)
	50000h−5FFFFh			Reserved	

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