Intel 815 manual 351

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0

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Bit		Description
8	LTVDA Direction Mask—R/W:This is a mask bit to determine whether the GPIO DIRECTION
	VALUE bit should be written into the register.
	0	= Do NOT write LTVDA Direction Value bit (default).
	1	= Write LTVDA Direction Value bit.
7:5	Reserved.
4	LTVCK Data In—RO:This is the value that is sampled on the LTVCK pin as an input.
	The Data In bits [12], [4] of the GPIOA (GPIOB) register are read only, however, data is only latched
	into these bits when a write is done to the respective bytes of the GPIOA (GPIOB) register. Thus a
	read of the Data In bits must be preceded with a dummy write.
3	LTVCK Data Value—R/W:This is the value that should be place on the LTVCK pin as an output. This
	value is only written into the register if LTVCK DATA MASK is also asserted. The value will appear on
	the pin if this data value is actually written to this register and the LTVCK DIRECTION VALUE
	contains a value that will configure the pin as an output.
2	GPIO2 Data Mask—R/W:This is a mask bit to determine whether the LTVCK DATA VALUE bit
	should be written into the register.
	0	= Do NOT write LTVCK Data Value bit (default).
	1	= Write LTVCK Data Value bit.
1	LTVCK Direction Value—R/W:This is the value that should be used to define the ouput enable of the
	LTVCK pin. This value is only written into the register if LTVCK DIRECTION MASK is also asserted.
	The value that will appear on the pin is defined by what is in the register for the LTVCK DATA
	VALUE.bit.
	0	= Pin is configured as an input (default)
	1	= Pin is configured as an output.
0	LTVCK Direction Mask—R/W:This is a mask bit to determine whether the GPIO DIRECTION
	VALUE bit should be written into the register.
	0	= Do NOT write LTVCK Direction Value bit (default).
	1	= Write LTVCK Direction Value bit.

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