Nortel Networks 553-3001-211 manual Functional description, CPU bus interface

Page 380 of 894 NT6D80 MSDL card

Functional description

Figure 80 on page 381 illustrates the MSDL functional block diagram. The MSDL card is divided into four major functional blocks:

•CPU bus interface

•Micro Processing Unit (MPU)

•Memory

•Serial interface

Two processing units serve as the foundation for the MSDL operation: the Central Processing Unit (CPU) and the MSDL Micro Processing Unit (MPU). CS 1000 Release 4.0 software, MSDL firmware, and peripheral software control MSDL parameters. Peripheral software downloaded to the MSDL controls MSDL operations.

The MSDL card’s firmware and software do the following:

•communicate with the CPU to report operation status

•receive downloaded peripheral software and configuration parameters

•coordinate data flow in conjunction with the CPU

•manage data link layer and network layer signaling that controls operations connection and disconnection

•control operation initialization and addressing

•send control messages to the operations

CPU bus interface

The CPU bus transmits packetized information between the CPU and the MSDL MPU. This interface has a 16-bit data bus, an 18-bit address bus, and interrupt and read/write control lines.

Shared Random Access Memory (RAM) between the CPU and the MSDL MPU provides an exchange medium. Both the CPU and the MSDL MPU can access this memory.

553-3001-211 Standard 2.00 September 2004