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Table 245

Digital Pad - values and offset allocations (Part 2 of 2)

PAD SET 0

 

 

PAD SET 1

 

 

 

 

 

Offset

 

PAD

Offset

 

PAD

 

 

 

 

 

 

9

 

9.0 dB

9

 

-9.0 dB

 

 

 

 

 

 

10

 

10.0 dB

10

 

-10.0 dB

 

 

 

 

 

 

11

 

11.0 dB

11

 

spare

 

 

 

 

 

 

12

 

12.0 dB

12

 

spare

 

 

 

 

 

 

13

 

13.0 dB

13

 

spare

 

 

 

 

 

 

14

 

14.0 dB

14

 

Idle Code

 

 

 

 

 

 

15

 

spare

15

 

Unassigned Code

 

 

 

 

 

 

Signaling interface

The signaling interface consists of the A07 DS-30X signaling controller. This interface provides an 8 Kbps signaling link via the DS-30X timeslot zero data bit zero. Messages are 3 bytes in length.

Carrier interface

For the E1 interface, the connection to the external digital carrier is provided by the line interface chip. This device provides accurate pulse shaping to meet the CCITT pulse mask requirements. It provides clock recovery functions on the receive side, as well as tolerance to jitter and wander in the received bit stream.

553-3001-211 Standard 2.00 September 2004

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