C8051F340/1/2/3/4/5/6/7
SFR Definition 22.4. PCA0L: PCA Counter/Timer Low Byte
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | Reset Value |
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| 00000000 |
Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | SFR Address: |
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| 0xF9 |
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The PCA0L register holds the low byte (LSB) of the
SFR Definition 22.5. PCA0H: PCA Counter/Timer High Byte
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | Reset Value |
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| 00000000 |
Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | SFR Address: |
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| 0xFA |
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The PCA0H register holds the high byte (MSB) of the
SFR Definition 22.6. PCA0CPLn: PCA Capture Module Low Byte
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | Reset Value | |
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| 00000000 |
Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | SFR Address: | |
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| 0xFB, 0xE9, |
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| 0xEB, 0xED, |
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| 0xFD |
PCA0CPLn Address: | PCA0CPL0 = 0xFB (n = 0), PCA0CPL1 = 0xE9 (n = 1), |
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| PCA0CPL2 = 0xEB (n = 2), PCA0CPL3 = 0xED (n = 3), |
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| PCA0CPL4 = 0xFD (n = 4) |
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The PCA0CPLn register holds the low byte (LSB) of the
Rev. 0.5 | 277 |