C8051F340/1/2/3/4/5/6/7

SFR Definition 7.2. CPT0MX: Comparator0 MUX Selection

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

-

CMX0N2

CMX0N1

CMX0N0

-

CMX0P2

CMX0P1

CMX0P0

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

00000000

SFR Address:

0x9F

Bit7:

UNUSED. Read = 0b, Write = don’t care.

 

Bits6–4: CMX0N2–CMX0N0: Comparator0 Negative Input MUX Select.

 

These bits select which Port pin is used as the Comparator0 negative input.

 

 

 

 

 

 

 

CMX0N1

CMX0N1

CMX0N0

Negative Input

Negative Input

 

 

 

 

(32-pin Package)

(48-pin Package)

 

0

0

0

P1.1

P2.1

 

0

0

1

P1.5

P2.6

 

0

1

0

P2.1

P3.5

 

0

1

1

P2.5

P4.4

 

1

0

0

P0.1

P0.4

Bit3:

UNUSED. Read = 0b, Write = don’t care.

 

Bits2–0: CMX0P2–CMX0P0: Comparator0 Positive Input MUX Select.

 

These bits select which Port pin is used as the Comparator0 positive input.

 

 

 

 

 

 

 

CMX0P1

CMX0P1

CMX0P0

Positive Input

Positive Input

 

 

 

 

(32-pin Package)

(48-pin Package)

 

0

0

0

P1.0

P2.0

 

0

0

1

P1.4

P2.5

 

0

1

0

P2.0

P3.4

 

0

1

1

P2.4

P4.3

 

1

0

0

P0.0

P0.3

Note that the port pins used by the comparator depend on the package type (32-pin or 48-pin).

Rev. 0.5

63

Page 63
Image 63
Silicon Laboratories C8051F342 SFR Definition 7.2. CPT0MX Comparator0 MUX Selection, CMX0N1 CMX0N0, CMX0P1 CMX0P0