C8051F340/1/2/3/4/5/6/7

SFR Definition 15.19. P3SKIP: Port3 Skip

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

 

Reset Value

 

 

 

 

 

 

 

 

00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

 

SFR Address:

0xDF

Bits7–0: P3SKIP[3:0]: Port3 Crossbar Skip Enable Bits.

These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana- log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil- lator circuit, CNVSTR input) should be skipped by the Crossbar.

0: Corresponding P3.n pin is not skipped by the Crossbar.

1: Corresponding P3.n pin is skipped by the Crossbar.

Note: P3.1–3.7 are only available on 48-pin devices.

SFR Definition 15.20. P4: Port4 Latch

R/W

 

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

P4.7

 

P4.6

P4.5

P4.4

P4.3

P4.2

P4.1

P4.0

11111111

Bit7

 

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

SFR Address:

 

 

 

 

 

 

 

 

 

0xC7

Bits7–0:

P4.[7:0]

 

 

 

 

 

 

 

 

Write - Output appears on I/O pins.

 

 

 

 

 

0: Logic Low Output.

1: Logic High Output (high impedance if corresponding P4MDOUT.n bit = 0).

Read - Always reads ‘0’ if selected as analog input in register P4MDIN. Directly reads Port pin when configured as digital input.

0: P4.n pin is logic low.

1: P4.n pin is logic high.

Note: P4 is only available on 48-pin devices.

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Silicon Laboratories C8051F347, C8051F346 SFR Definition 15.19. P3SKIP Port3 Skip, SFR Definition 15.20. P4 Port4 Latch