Silicon Laboratories C8051F345 ADC Window Compare Example Right-Justified Single-Ended Data

Models: C8051F346 C8051F347 C8051F344 C8051F342 C8051F343 C8051F345 C8051F340 C8051F341

1 282
Download 282 pages 2.89 Kb
Page 54
Image 54

C8051F340/1/2/3/4/5/6/7

5.4.1. Window Detector In Single-Ended Mode

Figure 5.6 shows two example window comparisons for right-justified, single-ended data, with ADC0LTH:ADC0LTL = 0x0080 (128d) and ADC0GTH:ADC0GTL = 0x0040 (64d). In single-ended mode, the input voltage can range from ‘0’ to VREF x (1023/1024) with respect to GND, and is represented by a 10-bit unsigned integer value. In the left example, an AD0WINT interrupt will be generated if the ADC0 conversion word (ADC0H:ADC0L) is within the range defined by ADC0GTH:ADC0GTL and ADC0LTH:ADC0LTL (if 0x0040 < ADC0H:ADC0L < 0x0080). In the right example, and AD0WINT interrupt will be generated if the ADC0 conversion word is outside of the range defined by the ADC0GT and ADC0LT registers (if ADC0H:ADC0L < 0x0040 or ADC0H:ADC0L > 0x0080). Figure 5.7 shows an exam- ple using left-justified data with equivalent ADC0GT and ADC0LT register settings.

 

ADC0H:ADC0L

Input Voltage

 

(Px.x - GND)

 

VREF x (1023/1024)

0x03FF

 

0x0081

VREF x (128/1024)

0x0080

 

0x007F

 

0x0041

VREF x (64/1024)

0x0040

 

0x003F

0

0x0000

 

 

ADC0H:ADC0L

 

Input Voltage

 

 

(Px.x - GND)

 

 

VREF x (1023/1024)

0x03FF

AD0WINT

 

 

not affected

 

 

 

 

0x0081

ADC0LTH:ADC0LTL

VREF x (128/1024)

0x0080

AD0WINT=1

 

0x007F

 

0x0041

 

 

ADC0GTH:ADC0GTL

VREF x (64/1024)

0x0040

 

 

0x003F

AD0WINT

 

 

not affected

 

 

 

0

0x0000

AD0WINT=1

ADC0GTH:ADC0GTL

AD0WINT

not affected

ADC0LTH:ADC0LTL

AD0WINT=1

Figure 5.6. ADC Window Compare Example: Right-Justified Single-Ended Data

 

ADC0H:ADC0L

 

Input Voltage

 

 

(Px.x - GND)

 

 

VREF x (1023/1024)

0xFFC0

 

 

 

AD0WINT

 

 

not affected

 

0x2040

 

VREF x (128/1024)

0x2000

ADC0LTH:ADC0LTL

 

0x1FC0

AD0WINT=1

 

0x1040

 

 

VREF x (64/1024)

0x1000

ADC0GTH:ADC0GTL

 

0x0FC0

 

 

 

AD0WINT

 

 

not affected

0

0x0000

 

 

ADC0H:ADC0L

 

Input Voltage

 

 

(Px.x - GND)

 

 

VREF x (1023/1024)

0xFFC0

 

 

 

AD0WINT=1

 

0x2040

 

VREF x (128/1024)

0x2000

ADC0GTH:ADC0GTL

 

0x1FC0

AD0WINT

 

 

 

0x1040

not affected

 

 

VREF x (64/1024)

0x1000

ADC0LTH:ADC0LTL

 

0x0FC0

 

 

 

AD0WINT=1

0

0x0000

 

Figure 5.7. ADC Window Compare Example: Left-Justified Single-Ended Data

54

Rev. 0.5

Page 54
Image 54
Silicon Laboratories C8051F345, C8051F347, C8051F346, C8051F341 ADC Window Compare Example Right-Justified Single-Ended Data