C8051F340/1/2/3/4/5/6/7
3.Global DC Electrical Characteristics
Table 3.1. Global DC Electrical Characteristics
Parameter | Conditions | Min | Typ | Max | Units |
|
|
|
|
|
|
Digital Supply Voltage1 |
| 2.7 | 3.3 | 3.6 | V |
Digital Supply Current with CPU | VDD = 3.3 V, Clock = 24 MHz |
| 15 |
| mA |
active | VDD = 3.3 V, Clock = 1 MHz |
| 0.7 |
| mA |
| VDD = 3.3 V, Clock = 32 kHz |
| 74 |
| µA |
Digital Supply Current with CPU | VDD = 3.3 V, Clock = 24 MHz |
| TBD |
| mA |
active and USB active (Full or | VDD = 3.3 V, Clock = 6 MHz |
| TBD |
| mA |
Low Speed) |
|
|
|
|
|
|
|
|
|
|
|
Digital Supply Current with CPU | VDD = 3.3 V, Clock = 24 MHz |
| 9 |
| mA |
inactive (not accessing Flash) | VDD = 3.3 V, Clock = 1 MHz |
| 0.5 |
| mA |
| VDD = 3.3 V, Clock = 32 kHz |
| 74 |
| µA |
Digital Supply Current (suspend | Oscillator not running |
| < 0.1 |
| µA |
mode or shutdown mode) |
|
|
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|
|
|
|
|
|
|
Digital Supply RAM Data Reten- |
|
| 1.5 |
| V |
tion Voltage |
|
|
| ||
|
|
|
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| |
|
|
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|
|
|
SYSCLK (System Clock)2 | C8051F340/1/2/3 | 0 |
| 48 | MHz |
| C8051F344/5/6/7 | 0 |
| 25 |
|
|
|
|
|
|
|
TSYSH (SYSCLK High Time) | C8051F340/1/2/3 @ 50 MHz | 9 |
|
| ns |
| C8051F344/5/6/7 | 18 |
|
|
|
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|
|
|
TSYSL (SYSCLK Low Time) | C8051F340/1/2/3 @ 50 MHz | 9 |
|
| ns |
| C8051F344/5/6/7 | 18 |
|
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|
Specified Operating Tempera- |
|
| +85 | °C | |
ture Range |
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| |||
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Notes:
1.USB Requires 3.0 V Minimum Supply Voltage.
2.SYSCLK must be at least 32 kHz to enable debugging.
Other electrical characteristics tables are found in the data sheet section corresponding to the associated peripherals. For more information on electrical characteristics for a specific peripheral, refer to the page indicated in Table 3.2.
Rev. 0.5 | 31 |