C8051F340/1/2/3/4/5/6/7
17.5.3. Slave Receiver Mode
Serial data is received on SDA and the clock is received on SCL. When slave events are enabled (INH = 0), the interface enters Slave Receiver Mode when a START followed by a slave address and direction bit (WRITE in this case) is received. Upon entering Slave Receiver Mode, an interrupt is generated and the ACKRQ bit is set. Software responds to the received slave address with an ACK, or ignores the received slave address with a NACK. If the received slave address is ignored, slave interrupts will be inhibited until the next START is detected. If the received slave address is acknowledged, zero or more data bytes are received. Software must write the ACK bit after each received byte to ACK or NACK the received byte. The interface exits Slave Receiver Mode after receiving a STOP. Note that the interface will switch to Slave Transmitter Mode if SMB0DAT is written while an active Slave Receiver. Figure 17.7 shows a typical Slave Receiver sequence. Two received data bytes are shown, though any number of bytes may be received. Notice that the ‘data byte transferred’ interrupts occur before the ACK cycle in this mode.
S
SLA
W A
Data Byte
A
Data Byte
A
Interrupt
P
Interrupt
Received by SMBus Interface
Transmitted by SMBus Interface
Interrupt
Interrupt
S = START
P = STOP
A = ACK
W = WRITE
SLA = Slave Address
Figure 17.7. Typical Slave Receiver Sequence
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