C8051F340/1/2/3/4/5/6/7

USB Register Definition 16.8. POWER: USB0 Power

R/W

R/W

R/W

R/W

R/W

R/W

R

R/W

Reset Value

ISOUD

-

-

USBINH

USBRST

RESUME

SUSMD

SUSEN

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

00010000

USB Address:

 

0x01

Bit7:

ISOUD: ISO Update

 

This bit affects all IN Isochronous endpoints.

 

0: When software writes INPRDY = ‘1’, USB0 will send the packet when the next IN token is

 

received.

 

1: When software writes INPRDY = ‘1’, USB0 will wait for a SOF token before sending the

 

packet. If an IN token is received before a SOF token, USB0 will send a zero-length data

 

packet.

Bits6–5:

Unused. Read = 00b. Write = don’t care.

Bit4:

USBINH: USB0 Inhibit

 

This bit is set to ‘1’ following a power-on reset (POR) or an asynchronous USB0 reset (see

 

Bit3: RESET). Software should clear this bit after all USB0 and transceiver initialization is

 

complete. Software cannot set this bit to ‘1’.

 

0: USB0 enabled.

 

1: USB0 inhibited. All USB traffic is ignored.

Bit3:

USBRST: Reset Detect

 

Writing ‘1’ to this bit forces an asynchronous USB0 reset. Reading this bit provides bus reset

 

status information.

 

Read:

 

0: Reset signaling is not present on the bus.

 

1: Reset signaling detected on the bus.

Bit2:

RESUME: Force Resume

 

Software can force resume signaling on the bus to wake USB0 from suspend mode. Writing

 

a ‘1’ to this bit while in Suspend mode (SUSMD = ‘1’) forces USB0 to generate Resume sig-

 

naling on the bus (a remote Wakeup event). Software should write RESUME = ‘0’ after

 

10 ms to15 ms to end the Resume signaling. An interrupt is generated, and hardware clears

 

SUSMD, when software writes RESUME = ‘0’.

Bit1:

SUSMD: Suspend Mode

 

Set to ‘1’ by hardware when USB0 enters suspend mode. Cleared by hardware when soft-

 

ware writes RESUME = ‘0’ (following a remote wakeup) or reads the CMINT register after

 

detection of Resume signaling on the bus.

 

0: USB0 not in suspend mode.

 

1: USB0 in suspend mode.

Bit0:

SUSEN: Suspend Detection Enable

 

0: Suspend detection disabled. USB0 will ignore suspend signaling on the bus.

 

1: Suspend detection enabled. USB0 will enter suspend mode if it detects suspend signaling

 

on the bus.

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Silicon Laboratories C8051F342 USB Register Definition 16.8. Power USB0 Power, Isoud Usbinh Usbrst Resume Susmd Susen