Silicon Laboratories C8051F340 Baud Rate Generator, Equation 19.1. UART1 Baud Rate, SBRLH1SBRLL1

Models: C8051F346 C8051F347 C8051F344 C8051F342 C8051F343 C8051F345 C8051F340 C8051F341

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C8051F340/1/2/3/4/5/6/7

19.1. Baud Rate Generator

The UART1 baud rate is generated by a dedicated 16-bit timer which runs from the controller’s core clock (SYSCLK), and has prescaler options of 1, 4, 12, or 48. The timer and prescaler options combined allow for a wide selection of baud rates over many SYSCLK frequencies.

The baud rate generator is configured using three registers: SBCON1, SBRLH1, and SBRLL1. The UART1 Baud Rate Generator Control Register (SBCON1, SFR Definition 19.4) enables or disables the baud rate generator, and selects the prescaler value for the timer. The baud rate generator must be enabled for UART1 to function. Registers SBRLH1 and SBRLL1 contain a 16-bit reload value for the dedi- cated 16-bit timer. The internal timer counts up from the reload value on every clock tick. On timer over- flows (0xFFFF to 0x0000), the timer is reloaded. For reliable UART operation, it is recommended that the UART baud rate is not configured for baud rates faster than SYSCLK/16. The baud rate for UART1 is defined in Equation 19.1.

Baud Rate =

---------------------------------------------------------------------------SYSCLK

1--

---------------------1

 

(65536 – (SBRLH1:SBRLL1))

2

 

Prescaler

Equation 19.1. UART1 Baud Rate

A quick reference for typical baud rates and system clock frequencies is given in Table 19.1.

Table 19.1. Baud Rate Generator Settings for Standard Baud Rates

 

Target Baud

Actual Baud

Baud Rate

Oscillator

SB1PS[1:0]

Reload Value in

 

Rate (bps)

Rate (bps)

Error

Divide

(Prescaler Bits)

SBRLH1:SBRLL1

 

 

 

 

Factor

 

 

 

230400

230769

0.16%

52

11

0xFFE6

MHz

115200

115385

0.16%

104

11

0xFFCC

57600

57692

0.16%

208

11

0xFF98

12

 

 

 

 

 

 

28800

28846

0.16%

416

11

0xFF30

=

 

 

 

 

 

 

14400

14388

0.08%

834

11

0xFE5F

SYSCLK

9600

9600

0.0%

1250

11

0xFD8F

2400

2400

0.0%

5000

11

0xF63C

1200

1200

0.0%

10000

11

0xEC78

 

230400

230769

0.16%

104

11

0xFFCC

MHz

115200

115385

0.16%

208

11

0xFF98

57600

57692

0.16%

416

11

0xFF30

24

 

 

 

 

 

 

28800

28777

0.08%

834

11

0xFE5F

=

 

 

 

 

 

 

14400

14406

0.04%

1666

11

0xFCBF

SYSCLK

9600

9600

0.0%

2500

11

0xFB1E

2400

2400

0.0%

10000

11

0xEC78

1200

1200

0.0%

20000

11

0xD8F0

 

230400

230769

0.16%

208

11

0xFF98

MHz

115200

115385

0.16%

416

11

0xFF30

57600

57554

0.08%

834

11

0xFE5F

48

 

 

 

 

 

 

28800

28812

0.04%

1666

11

0xFCBF

=

 

 

 

 

 

 

14400

14397

0.02%

3334

11

0xF97D

SYSCLK

9600

9600

0.0%

5000

11

0xF63C

2400

2400

0.0%

20000

11

0xD8F0

1200

1200

0.0%

40000

11

0xB1E0

 

 

 

 

 

 

 

220

Rev. 0.5

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Silicon Laboratories C8051F340, C8051F347, C8051F346 Baud Rate Generator, Equation 19.1. UART1 Baud Rate, SBRLH1SBRLL1