Silicon Laboratories C8051F344, C8051F347, C8051F346 SFR Definition 15.11. P1SKIP Port1 Skip

C8051F340/1/2/3/4/5/6/7

SFR Definition 15.11. P1SKIP: Port1 Skip

R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W	Reset Value
								00000000
Bit7	Bit6	Bit5	Bit4	Bit3	Bit2	Bit1	Bit0	SFR Address:

0xD5

Bits7–0: P1SKIP[7:0]: Port1 Crossbar Skip Enable Bits.

These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana- log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil- lator circuit, CNVSTR input) should be skipped by the Crossbar.

0: Corresponding P1.n pin is not skipped by the Crossbar.

1: Corresponding P1.n pin is skipped by the Crossbar.

SFR Definition 15.12. P2: Port2 Latch

R/W		R/W	R/W	R/W	R/W	R/W	R/W		R/W	Reset Value
P2.7		P2.6	P2.5	P2.4	P2.3	P2.2	P2.1		P2.0	11111111
Bit7		Bit6	Bit5	Bit4	Bit3	Bit2	Bit1		Bit0	SFR Address:
								(bit addressable)		0xA0
Bits7–0:	P2.[7:0]
	Write - Output appears on I/O pins per Crossbar Registers (when XBARE = ‘1’).

0: Logic Low Output.

1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).

Read - Always reads ‘0’ if selected as analog input in register P2MDIN. Directly reads Port pin when configured as digital input.

0: P2.n pin is logic low.

1: P2.n pin is logic high.

SFR Definition 15.13. P2MDIN: Port2 Input Mode

R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W	Reset Value
								11111111
Bit7	Bit6	Bit5	Bit4	Bit3	Bit2	Bit1	Bit0	SFR Address:

0xF3

Bits7-0: Analog Input Configuration Bits for P2.7-P2.0 (respectively).

Port pins configured as analog inputs have their weak pull-up, digital driver, and digital receiver disabled.

0: Corresponding P2.n pin is configured as an analog input.

1: Corresponding P2.n pin is not configured as an analog input.

Rev. 0.5 157