C8051F340/1/2/3/4/5/6/7

6.Voltage Reference

The Voltage reference MUX on C8051F340/1/2/3/4/5/6/7 devices is configurable to use an externally con- nected voltage reference, the on-chip reference voltage generator, or the power supply voltage VDD (see Figure 6.1). The REFSL bit in the Reference Control register (REF0CN) selects the reference source. For the internal reference or an external source, REFSL should be set to ‘0’; For VDD as the reference source, REFSL should be set to ‘1’.

The BIASE bit enables the internal ADC bias generator, which is used by the ADC and Internal Oscillator. This enable is forced to logic 1 when either of the aforementioned peripherals is enabled. The ADC bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register REF0CN; see SFR Defini- tion 6.1 for REF0CN register details. The Reference bias generator (see Figure 6.1) is used by the Internal Voltage Reference, Temperature Sensor, and Clock Multiplier. The Reference bias is automatically enabled when any of the aforementioned peripherals are enabled. The electrical specifications for the volt- age reference and bias circuits are given in Table 6.1.

Important Note About the VREF Pin: The VREF pin, when not using the on-chip voltage reference or an external precision reference, can be configured as a GPIO Port pin. When using an external voltage refer- ence or the on-chip reference, the VREF pin should be configured as analog pin and skipped by the Digital Crossbar. To configure the VREF pin for analog mode, set the corresponding bit in the PnMDIN register to ‘0’. To configure the Crossbar to skip the VREF pin, set the corresponding bit in register PnSKIP to ‘1’. Refer to Section “15. Port Input/Output” on page 147 for complete Port I/O configuration details.

The temperature sensor connects to the ADC0 positive input multiplexer (see Section “5.1. Analog Multi- plexer” on page 42 for details). The TEMPE bit in register REF0CN enables/disables the temperature sensor. While disabled, the temperature sensor defaults to a high impedance state and any ADC0 mea- surements performed on the sensor result in meaningless data.

REF0CN

REFSLTEMPEBIASEREFBE

AD0EN

EN

IOSCEN

ADC Bias

To ADC,

Internal Oscillator

VDD

External

 

Voltage

R1

Reference

Circuit

VREF

GND

 

 

 

 

 

 

 

 

 

EN

Temp Sensor

 

 

To Analog Mux

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VREF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

 

1

 

CLKMUL

 

 

 

(to ADC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Enable

 

 

 

 

 

 

 

 

Reference

 

 

To Clock Multiplier,

 

 

TEMPE

 

 

 

 

 

EN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bias

 

 

Temp Sensor

 

 

 

 

REFBE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EN

 

 

 

 

 

 

 

 

 

 

Internal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reference

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 6.1. Voltage Reference Functional Block Diagram

Rev. 0.5

57

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Image 57
Silicon Laboratories C8051F346, C8051F347, C8051F341, C8051F343, C8051F340 Voltage Reference Functional Block Diagram