C8051F340/1/2/3/4/5/6/7
SFR Definition 21.14. TMR3RLL: Timer 3 Reload Register Low Byte
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | Reset Value |
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| 00000000 |
Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | SFR Address: |
0x92
Bits
TMR3RLL holds the low byte of the reload value for Timer 3 when operating in
SFR Definition 21.15. TMR3RLH: Timer 3 Reload Register High Byte
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | Reset Value |
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| 00000000 |
Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | SFR Address: |
0x93
Bits
The TMR3RLH holds the high byte of the reload value for Timer 3 when operating in
SFR Definition 21.16. TMR3L: Timer 3 Low Byte
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | Reset Value |
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| 00000000 |
Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | SFR Address: |
0x94
Bits
In
SFR Definition 21.17. TMR3H Timer 3 High Byte
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | Reset Value |
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| 00000000 |
Bit7 | Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | SFR Address: |
0x95
Bits
In
262 | Rev. 0.5 |