F

Format Specification

5-8

 

 

State

5-8

 

 

 

 

Timing

5-8

 

 

 

 

Format Specification menu

5-7

Full Qualification Specification

5-45

 

 

G

 

 

 

general purpose probing 2-3

 

Glitch Acquisition Mode

C-5, 5-31

minimum detectable glitch

C-2

Glitch Triggering

5-41

 

 

grabbers

2-6

 

 

 

 

green dotted line

7-10

 

 

grounds

2-6

 

 

 

 

pod 2-6

 

 

 

 

probe

2-7

 

 

 

 

 

 

H

 

 

 

hold time

C-1

 

 

 

 

 

 

I

 

 

 

indicators

C-7

 

 

 

 

activity

5-9, 7-4, 8-5

 

 

green dotted line

7-10

 

 

red dotted line

7-10

 

 

X and O markers

7-10

 

 

yellow dotted line

7-10

 

initial inspection

A-1

 

 

installation

 

 

 

 

HP 16510B

 

 

 

 

Front-Panel Reference

logic analyzer module A-2

 

 

module

A-2

 

 

 

 

Installing New Logic Analyzer Boards

A-1

interface

 

 

 

 

 

 

user

3-1

 

 

 

 

 

interfaces

 

 

 

 

 

HP-IB 1-1

 

 

 

 

RS-232C 1-1

 

 

 

user

1-1

 

 

 

 

 

inverse assembled data

 

 

 

how to display

14-2, 14-19

 

 

inverse assembler file

14-18

 

 

 

 

 

K

 

 

 

knob 1-1 / 1-2, 3-1

 

 

 

 

 

 

L

 

 

 

Label Value vs. State (Chart Mode)

11-4

Label vs. Label (Chart Mode) 11-5

 

Labeling Pods, Probes, and Cables

2-12

labels

 

 

 

 

 

 

State Format Specification menu

5-9

State Trace Specification menu

5-65

symbol table

5-14

 

 

 

Timing Format Specification menu

5-9

 

 

 

M

 

 

 

machine

1-2, 3-1

 

 

 

markers

 

 

 

 

 

 

functions

C-8

 

 

 

State Listing

6-12

 

 

 

Timing Waveforms

6-3

 

 

markers (State)

 

 

 

 

Off

6-13

 

 

 

 

Index-3