Figure 5-23. Single Clock Pop-up Menu
With this menu you set the condition needed by each clock. You can specify that the logic analyzer looks for the negative edge of the clock, the positive edge, either edge, a high level, or a low level, or you can turn the clock off.
The clocks are combined by ORing and ANDing them. Clock edges are ORed to clock edges, clock levels are ORed to clock levels, and clock edges are ANDed to clock levels.
For example, if you select ↓ for the J clock, − for the K clock, High for the M clock, and Low for the N clock, the resulting clocking arrangement will appear in the display as:
Figure 5-24. Example of a Clocking Arrangement
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