With this arrangement, the logic analyzer will clock the data when there is a negative edge of the J clock OR a positive edge of the K clock, AND when there is a high level on the M clock OR a low level on the N clock.
You must always specify at least one clock edge. If you try to use only clock levels, the logic analyzer will display a message telling you that at least one edge is required.
7Pod Clock Your logic analyzer has the capability of clocking data in three different ways. The pod Clock fields in the State Format Specification menu allow you to specify which of the three ways you want to clock the data.
Each pod assigned to the state analyzer has a pod Clock field associated with it. As with the Clock field discussed in the previous section, the pod Clock fields are present only in the state analyzer. Selecting one of the pod Clock fields gives you the following
Figure 5-25. Pod Clock Field Pop-up Menu
HP 16510B | Menus |
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